In recent years, electronic apparatuses such as mobile phones, tablet PCs (Personal Computers) and so on have been equipped with a liquid crystal driver requiring a power supply voltage higher than a battery voltage and various processors requiring a power supply voltage lower than the battery voltage. A DC/DC converter is used to supply an appropriate power supply voltage to such devices.
A hysteresis control system has been known as a control system for DC/DC converters. The hysteresis control system has excellent load responsiveness over a voltage mode or current mode control system using an error amplifier.
FIGS. 1A and 1B are circuit diagrams showing a step-down DC/DC converter employing a hysteresis control system.
A step-down DC/DC converter 900a shown in FIG. 1A includes an output circuit 901, a driver 904 and a pulse modulator 906. The step-down DC/DC converter 900a stabilizes an input voltage VIN of an input line 902 to a predetermined voltage level which is then supplied to a load (not shown) connected to an output line 903. The output circuit 901 includes a switching transistor M1, a synchronous rectification transistor M2, an inductor L1 and an output capacitor C1. The output capacitor C1 includes an equivalent series resistance ESR.
The pulse modulator 906 generates a pulse signal S1 with a duty cycle adjusted such that an output voltage VOUT approaches a predetermined target level. The pulse modulator 906 includes resistors R1 and R2, a capacitor C2 and a hysteresis comparator 910.
The resistors R1 and R2 divide the output voltage VOUT. The divided output voltage VOUT is also called a feedback voltage VOUT′. The hysteresis comparator 910 compares the feedback voltage VOUT′ with a threshold voltage VTH and generates the pulse signal S1 indicating a result of the comparison. The threshold voltage VTH transitions between two voltage levels VH and VL depending on the comparison result. The pulse signal S1 has a high level when VH>VOUT′ and has a low level when VH<VOUT′.
The driver 904 turns on the switching transistor M1 and turns off the synchronous rectification transistor M2 when the pulse signal S1 has the high level and turns off the switching transistor M1 and turns on the synchronous rectification transistor M2 when the pulse signal S1 has the low level.
FIG. 2 is an operation waveform diagram of the step-down DC/DC converter 900a shown in FIG. 1A. At time t1, the pulse signal S1 transitions to the high level. At this time, the threshold voltage VTH transitions to the upper level VH.
In the period during which the pulse signal S1 has the high level, a coil current IL increases and a voltage drop of the ESR increases as well. As a result, the output voltage VOUT rises and the feedback voltage VOUT′ rises as well. At time t2, when the feedback voltage VOUT′ reaches the upper level VH, the threshold voltage VTH transitions to the lower level VL and the output S1 of the hysteresis comparator 910 transitions to a low level.
In the period during which the pulse signal S1 has the low level, the coil current IL decreases with time and the voltage drop of the ESR decreases as well. As a result, the output voltage VOUT falls and the feedback voltage VOUT′ falls as well. At time t2, when the feedback voltage VOUT′ falls to the lower level VL, the threshold voltage VTH transitions to the upper level VH again and the output S1 of the hysteresis comparator 910 transitions to a high level.
The step-down DC/DC converter 900a repeats this operation. As a result, the feedback voltage VOUT′ is stabilized between VH and VL and the output voltage VOUT is stabilized between VH×(R1+R2)/R2 and VL×(R1+R2)/R2.
In the step-down DC/DC converter 900a shown in FIG. 1A, the voltage drop of the ESR of the output capacitor C1 is used as a ripple of the feedback voltage VOUT. In this case, however, there are problems in that a switching frequency is affected by variations of the ESR and that the power loss due to the ESR cannot be ignored.
A step-down DC/DC converter of a ripple injection type has been proposed to overcome the problems of the step-down DC/DC converter 900a shown in FIG. 1A. FIG. 1B shows a step-down DC/DC converter 900b employing a ripple injection type hysteresis control system.
The step-down DC/DC converter 900b shown in FIG. 1B includes a ripple injection circuit 912 in addition to the step-down DC/DC converter 900a shown in FIG. 1A.
The ripple injection circuit 912 receives the output signal S1 of the hysteresis comparator 910 or a correlated pulse signal and superimposes a ripple on an input side of the hysteresis comparator 910. Specifically, the ripple injection circuit 912 superimposes a voltage sloped in the positive direction with respect to the feedback voltage VOUT′ in the period during which the output S1 of the hysteresis comparator 910 has the high level, that is, the period during which the switching transistor M1 is turned on and the synchronous rectification transistor M2 is turned off, and superimposes a voltage sloped in the negative direction with respect to the feedback voltage VOUT′ in the period during which the output S1 of the hysteresis comparator 910 has a low level, that is, the period during which the switching transistor M1 is turned off and the synchronous rectification transistor M2 is turned on. Thus, without using the ripple due to the ESR, a ripple is superimposed on the feedback voltage VOUT′.
An operation of the step-down DC/DC converter 900b shown in FIG. 1B will now be described with reference to FIG. 2. At time t1, the pulse signal S1 transitions to the high level. At this time, the threshold voltage VTH transitions to the upper level VH.
In the period during which the pulse signal S1 has the high level, a positive-sloped voltage is superimposed on the feedback voltage VOUT′ by the ripple injection circuit 912 and the feedback voltage VOUT′ increases with time. At time t2, when the feedback voltage VOUT′ reaches the upper level VH, the threshold voltage VTH transitions to the lower level VL and the output S1 of the hysteresis comparator 910 transitions to a low level.
In the period during which the pulse signal S1 has a low level, a negative-sloped voltage is superimposed on the feedback voltage VOUT′ by the ripple injection circuit 912 and the feedback voltage VOUT′ decreases with time. At time t3, when the feedback voltage VOUT′ falls to the lower level VL, the threshold voltage VTH transitions to the upper level VH again and the output S1 of the hysteresis comparator 910 transitions to a high level.
The step-down DC/DC converter 900b repeats this operation. As a result, the feedback voltage VOUT′ is stabilized between VH and VL and the output voltage VOUT is stabilized between VH×(R1+R2)/R2 and VL×(R1+R2)/R2.
Although the switching frequency of the DC/DC converter is not necessarily constant, the operation mode shown in FIG. 2 is referred to as a PWM mode.
In order to increase efficiency at a light load state of the DC/DC converter, the DC/DC converter may be operated in a mode (referred to as a PFM mode) different from the PWM mode. In the PFM mode, the switching transistor is turned off when the coil current IL reaches a predetermined peak current IPEAK, and the switching transistor is turned on when the output voltage VOUT decreases to a target voltage. In this mode, the switching frequency is dynamically varied depending on a load current. As the load current decreases, the switching frequency is lowered to reduce a switching loss.
FIGS. 3A and 3B are waveform diagrams of a coil current IL in switching from a PWM mode to a PFM mode and switching from the PFM mode to the PWM mode, respectively.
An average of the coil current IL corresponds to the load current IOUT. In FIG. 3A, an initial state is a PWM mode. As the load current IOUT decreases, the coil current IL becomes smaller and eventually turns negative. The step-down DC/DC converter 900 transitions to a PFM mode when a state in which the coil current IL becomes negative continues over a predetermined number (N) of cycles (time t0).
In FIG. 3B, an initial state is a PFM mode. As the load current IOUT increases, the coil current IL increases as well. The step-down DC/DC converter 900 transitions to a PWM mode when a bottom level of the coil current IL becomes positive at time t1.
The present inventors have examined the switching between the PWM mode and the PFM mode and came to recognize the following problems.
Firstly, the average level (bias point) of the output voltage VOUT in the PWM mode is not equal to the average level of the output voltage VOUT in the PFM mode. Therefore, overshoot and undershoot are likely to occur in the switching between the PWM mode and the PFM mode. Large overshoot and undershoot are unfavorable because they can cause malfunction of the load circuit.
Secondly, a load current IOUT1 in the transition from the PWM mode of FIG. 3A to the PFM mode is not equal to a load current IOUT2 in the transition from the PFM mode of FIG. 3B to the PWM mode. In other words, a hysteresis exists regarding the load current IOUT in transition between the PFM mode and the PWM mode and there is a problem in that there is a decrease in efficiency of the DC/DC converter 900 in a hysteresis region.
Thirdly, if there is a steep fluctuation in the load current IOUT with the mode switching, the DC/DC converter 900 cannot follow the load fluctuation by a delay due to the mode switching, which may be a factor in causing fluctuation in the output voltage VOUT.
These problems may occur not only in the step-down DC/DC converter but also in switching power supplies having different topologies, such as a step-up DC/DC converter, a step-up/step-down DC/DC converter, a forward converter, a flyback converter and so on. In addition, these problems must not be considered as problems generally recognized in the art but as originally recognized by the present inventors.